RapidIO provides extensive care to your embedded computer

RapidIO was also designed to support peer-to-peer embedded computer. It was assumed multiple host or master processors would be in the system and that those processors needed to communicate with each other through shared memory, interrupts, and messages. Multiple processors (up to 16K) can be configured in a RapidIO network, each with their own complete address space.

RapidIO also provides a clean dividing line between the functionality of embedded computers and endpoints. RapidIO switches only make switching decisions based on explicit source/destination address pairs and explicit priorities. This allows RapidIO endpoints to add new transaction types without requiring changes or enhancements to the switch devices.

refer to: http://embedded-computing.com/articles/rapidio-optimized-low-latency-processor-connectivity/#at_pco=cfd-1.0