Innovative approach to communication

Generic multicore processors have been promoted as the solution to networking communication processing. In reality, they can’t address the scalability, determinism, and ease of programming required for next-generation networking infrastructure. An asymmetric multicore approach that blends multicore processors with networking-optimized accelerator engines and C-programmable libraries meets the challenges of next-generation networks.
Achieving deterministic performance is a key requirement for network operators to ensure reliability across wide variations of traffic profiles and applications. Multicore processors can meet performance challenges when running an application on a single, dual-core, or quad-core processor. However, when scaling to eight cores or beyond, performance scaling usually degrades. There are cases where eight cores deliver no better performance than four, and 16 cores actually run slower than eight.
Networking applications tend to be data-intensive, and generic multicore processors are highly susceptible to the impacts of memory latency on performance. The nonlinearities of memory latency (Figure 1) with regard to memory load combined with the nonlinearities of processor performance relative to memory latency can lead to unpredictable and unreliable performance. The innovative approach taken by LSI to solving this problem is asymmetrical multicore processors, which combine general-purpose processors with specialized accelerators for particular data-intensive tasks, resulting in an optimal, scalable solution.

Asymmetrical multicore processors improve performance predictability by combining general-purpose processors and accelerators to address the nonlinearities of memory latency.

refer: http://embedded-computing.com/articles/an-multicore-done-right244/